IPcore Release Package Should include:
- Synthesizable Verilog RTL
- Bit-accurate C model
- Verilog testbench
- Detailed product documentation
- Design specifications
- Integration guidelines
- Complete verification suite
- VHS tape with example noisy signals
- Extensive tests including corner-case scenarios
- Golden test result vectors
- FPGA test board (with testbench and supporting files)
- Support and training
- to be added...